218 Layers With Superior Scaling

Kioxia’s product sales space at FMS 2024 was a busy one with various know-how demonstrations sustaining firm occupied. A walk-through of the BiCS 8 manufacturing course of was the primary to seize my consideration. Kioxia and Western Digital launched the sampling of BiCS 8 in March 2023. We had touched briefly upon its CMOS Bonded Array (CBA) scheme in our security of Kioxial’s 2Tb QLC NAND system and security of Western Digital’s 128 TB QLC enterprise SSD proof-of-concept demonstration. At Kioxia’s product sales space, we bought additional insights.

Historically, fabrication of flash chips concerned placement of the affiliate logic circuitry (CMOS course of) all through the periphery of the flash array. The technique then moved on to inserting the CMOS beneath the cell array, nonetheless the wafer growth course of was serialized with the CMOS logic getting fabricated first adopted by the cell array on extreme. Nevertheless, this has some challenges due to the cell array requires a high-temperature processing step to make sure greater reliability which can be detrimental to the correctly being of the CMOS logic. Attributable to latest developments in wafer bonding strategies, the mannequin new CBA course of permits the CMOS wafer and cell array wafer to be processed independently in parallel after which pieced collectively, as confirmed all through the fashions above.

The BiCS 8 3D NAND incorporates 218 layers, in contrast with 112 layers in BiCS 5 and 162 layers in BiCS 6. The corporate determined to skip over BiCS 7 (or, pretty, it was maybe a short-lived know-how meant as an inside take a look at automotive). The know-how retains the four-plane worth lure constructing of BiCS 6. In its TLC avatar, it’s in the marketplace as a 1 Tbit system. The QLC model is accessible in two capacities – 1 Tbit and some Tbit.

Kioxia furthermore well-known that whereas the variety of layers (218) would not examine favorably with the most recent layer counts from the opponents, its lateral scaling / cell shrinkage has enabled it to be aggressive with regards to bit density together with working speeds (3200 MT/s). For reference, the most recent transport NAND from Micron – the G9 – has 276 layers with a bit density in TLC mode of 21 Gbit/mm²and operates at as loads as 3600 MT/s. Nevertheless, its 232L NAND operates solely as loads as 2400 MT/s and has a bit density of 14.6 Gbit/mm².

It should be well-known that the CBA hybrid bonding course of has benefits over the present processes utilized by utterly totally different distributors – together with Micron’s CMOS beneath array (CuA) and SK hynix’s 4D PUC (periphery-under-chip) developed all through the late 2010s. It’s anticipated that utterly totally different NAND distributors may additionally swap in the long run to some variant of the hybrid bonding scheme utilized by Kioxia.